This is a replacement for the MC6883 Synchronous Address Multiplexer (SN74LS783).
It uses a Xilinx XC95144XL CPLD with minimal external circuitry.
A 3.3V regulator is required for the power supply pins of the CPLD, but its inputs are 5V tolerant, and CMOS 3.3V outputs are compatible with 5V TTL inputs elsewhere on the board.
This board also provides extensions similar to Stewart Orchard's Dragon 256K Banker Board, though this is untested.
As of version 1.0, 4K and 16K RAM sizes are supported. Refresh is 8-bit. All MPU rates supported. Video address "glitching" supported, at least enough to support proof-of-concept code.
There is an on-board oscillator; using a crystal as the timing source would require some more interfacing logic.
Schematic and PCB layout are for KiCad 7. VHDL source buildable with Xilinx ISE.
As of version 1.2, multiple variants can be built from the command line. A summary of the make targets (having sourced the ISE environment configuration, and running from the cpld/ subdirectory):
- make samx4
- Default '783 build with 256K, 16K, 4K support.
- make samx4-785
- Same but with the changes in the '785.
- make samx4-rockyhill
- make samx4-785-rockyhill
- Builds targetting the pinout used on Pedro's board shrink.
Although a usable design was up and running quite quickly, input from Stewart Orchard got some niggles worked out a lot sooner than they would have been otherwise, for which much thanks. Also, thanks to Stewart for testing banked 16K operation in an appropriate Dragon 32.
Thanks are also due to Pedro Peña (Rocky Hill), who tested across a wide range of Tandy Colour Computers while developing the 4K/16K support:
Notes for version 1.2
- Moved PCB files into subdirectory
- Included Pedro Peña's PCB shrink into main distribution
- CPLD source now configurable through generics
- Build system supports multiple variants
Also includes extra variants you can build "for fun" that sacrifice some ram size functions for extra video offset registers. No PCB changes.
Version 1.2.1 includes a missing template file required for build.
Notes for version 1.1
- Banked 16K operation fixed (e.g. earlier Dragon 32).
- CPLD build from Makefile.
No PCB changes.
Notes for version 1.0
- 4K, 16K RAM size support.
- SN74LS785 16K x 4 DRAM support.
Updates are to CPLD code only, no PCB changes.
Note that the configuration option for '785 support has been renamed to want_785. There are also several other options for omitting support for certain features.
256K support remains untested, as does two-bank 4K behaviour.