Sock's RS-232 Pak Data Sheet

The heart of the Deluxe RS-232 Pak is the Synertek 6551 ACIA. It has an on-chip baud rate generator, programmable interrupts and status register for ease of operation, false start bit detection, and echo mode

This ACIA board is memory mapped to addresses $FF68 (65384) to $FF6B (65387).

The 6551 uses 4 memory addresses for the following functions:
AddressWriteRead
FF68Transmit data
Register		Received data
Register
FF69Soft ResetStatus Register
FF6ACommand Register
FF6BControl Register

This table shows that only the Command and Control registers are bidirectional. The Soft Reset operation clears the 6551 internal registers but does not cause any data transfer. Therefore, the data written is a "don't care." A RES* from the bus will clear all registers in the 6551 while a Soft Reset will disable interrupts and transmitter, turn off echo mode, and clear the Overrun Error flag only.

The following shows the Status, Command, and Control Register and gives programming examples for each:

Status Register ($FF69)

The Status Register is used to indicate to the processor the status of various SY6551 functions.

STATUS REGISTER
76543210

STATUSSET BYCLEARED BY
Parity Error*0=No Error
1=Error		Self Clearing**
Framing Error*0=No Error
1=Error		Self Clearing**
Overrun*0=No Error
1=Error		Self Clearing**
Receive Data
Register Full		0=Not Full
1=Full		Read Receive
Data Register
Transmit Data
Register Empty		0=Not Empty
1=Empty		Write Transmit
Data Register
DCD0=DCD Low
1=DCD High		Net Reusable Reflects DSR State
DSR0=DSR Low
1=DSR High		Net Reusable Reflects DSR State
IRQ0=No Interrupt
1=Interrupt		Read Status Register

*NO INTERRUPT GENERATED FOR THESE CONDITIONS.
**CLEARED AUTOMATICALLY AFTER A READ OF RDR AND THE NEXT ERROR FREE RECEIPT OF DATA.

STATUS REGISTER76543210
HARDWARE RESET0--10000
PROGRAM RESET-----0--

Command Register ($FF6A)

The Command Register is used to control Specific Transmit/Receive functions.

COMMAND REGISTER
76543210

BITPARITY CHECK CONTROLS
765
--0Parity Disabled - No Parity Bit Generated - No Parity Bit Received
001Odd Parity Receiver and Transmitter
011Even Parity Receiver and Transmitter
101Mark Parity Bit Transmitted, Parity Check Disabled
111Space Parity Bit Transmitted, Parity Check Disabled

BIT 4NORMAL ECHO MODE FOR RECEIVER
0Normal
1Echo (Bits 2 and 3 must be "0")

TRANSMITTER CONTROLS
BITTRANSMIT INTERRUPTRTS LEVELTRANSMITTER
32
00DisabledHighOff
01EnabledLowOn
10DisabledLowOn
11DisabledLowTransmit BRK

BIT 1RECEIVER INTERRUPT ENABLE
0IRQ Interrupt Enabled from Bit 3 of Status Register
1IRQ Interrupt Disabled

BIT 0DATA TERMINAL READY
0Disable Receiver and All Interrupts (DTR high)
1Enable Receiver and All Interrupts (DTR low)

COMMAND REGISTER76543210
HARDWARE RESET00000000
PROGRAM RESET---00000

Control Register ($FF6B)

The Control Register is used to select the desired mode for the SY6551. The word length, number of stop bits, and clock controls are all determined by the Control Register.

CONTROL REGISTER
76543210

BIT 7STOP BITS
01 Stop Bit
12 Stop Bits
1 Stop Bit if Word Length = 8 Bits and Parity*
1.5 Stop Bits if Word Length = 5 Bits and No Parity
*This allows for 9-bit transmission (8 data bits plus parity).

BITDATA WORD LENGTH
65
008
017
106
115

BIT 4RECEIVER CLOCK SOURCE
0External Receiver Clock
1Baud Rate Generator

BITBAUD RATE GENERATOR
3210
000016x ENTERNAL CLOCK*
000150 BAUD
001075 BAUD
0011109.92 BAUD
0100134.58 BAUD
0101150 BAUD
0110300 BAUD
0111600 BAUD
10001200 BAUD
10011800 BAUD
10102400 BAUD
10113600 BAUD
11004800 BAUD
11017200 BAUD
11109600 BAUD
111119200 BAUD
*This works out to be 115200 baud, and it *almost* works!

CONTROL REGISTER76543210
HARDWARE RESET00000000
PROGRAM RESET--------

RS-232C Pin Description

Pin NumberSignal
1Frame Ground
2Transmit Data
3Receive Data
4Request to Send
5Clear to Send
6Data Set Ready
7Signal Ground
8Carrier Detect
20Data Terminal Ready

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